UpDown counter

module counterupdown(clock,reset,count,s);
  input clock,reset,s;
  output[2:0]count;
  reg[2:0] count;
  always@(posedge clock)
  begin
   if(s==0)
     if(reset)
       count=3'b000;
     else
       count=count+1;
   else if(s==1)
     if(reset)
       count=3'b111;
     else
       count=count-1;
  end
 endmodule